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ADE7753
0xFFFF,FFFF,FFFF before it overflows. The integration time
under these conditions with WDIV = 0 is calculated as follows:
are generated at the DFC output. Under steady load conditions,
the output frequency is proportional to the active power.
Time =
0 xFFFF, FFFF, FFFF
0 xCCCCD
× 1.12 μs = 375.8 s = 6.26 min(15)
The maximum output frequency, with ac input signals at full scale
and CFNUM = 0x00 and CFDEN = 0x00, is approximately 23 kHz.
When WDIV is set to a value different from 0, the integration
time varies, as shown in Equation 16.
The ADE7753 incorporates two registers, CFNUM[11:0] and
CFDEN[11:0], to set the CF frequency. These are unsigned
Time = Time WDIV = 0 × WDIV
(16)
12-bit registers, which can be used to adjust the CF frequency to
a wide range of values. These frequency-scaling registers are
POWER OFFSET CALIBRATION
The ADE7753 also incorporates an active power offset register
(APOS[15:0]). This is a signed twos complement 16-bit register
that can be used to remove offsets in the active power calculation—
see Figure 65. An offset could exist in the power calculation due
to crosstalk between channels on the PCB or in the IC itself.
The offset calibration allows the contents of the active power
register to be maintained at 0 when no power is being consumed.
The 256 LSBs (APOS = 0x0100) written to the active power
offset register are equivalent to 1 LSB in the waveform sample
register. Assuming the average value, output from LPF2 is
0xCCCCD (838,861d) when inputs on Channels 1 and 2 are
both at full scale. At ?60 dB down on Channel 1 (1/1000 of the
Channel 1 full-scale input), the average word value output from
LPF2 is 838.861 (838,861/1,000). One LSB in the LPF2 output
has a measurement error of 1/838.861 × 100% = 0.119% of the
average value. The active power offset register has a resolution
equal to 1/256 LSB of the waveform register, therefore the power
offset correction resolution is 0.00047%/LSB (0.119%/256) at –60 dB.
ENERGY-TO-FREQUENCY CONVERSION
ADE7753 also provides energy-to-frequency conversion for
calibration purposes. After initial calibration at manufacturing,
the manufacturer or end customer often verify the energy meter
calibration. One convenient way to verify the meter calibration
12-bit registers, which can scale the output frequency by 1/2 12 to
1 with a step of 1/2 12 .
If the value 0 is written to any of these registers, the value 1
would be applied to the register. The ratio (CFNUM + 1)/
(CFDEN + 1) should be smaller than 1 to ensure proper
operation. If the ratio of the registers (CFNUM + 1)/(CFDEN + 1)
is greater than 1, the register values would be adjusted to a ratio
(CFNUM + 1)/(CFDEN + 1) of 1. For example, if the output
frequency is 1.562 kHz while the contents of CFDEN are 0
(0x000), then the output frequency can be set to 6.1 Hz by
writing 0xFF to the CFDEN register.
When CFNUM and CFDEN are both set to one, the CF pulse
width is fixed at 16 CLKIN/4 clock cycles, approximately 18 μs
with a CLKIN of 3.579545 MHz. If the CF pulse output is
longer than 180 ms for an active energy frequency of less than
5.56 Hz, the pulse width is fixed at 90 ms. Otherwise, the pulse
width is 50% of the duty cycle.
The output frequency has a slight ripple at a frequency equal to
twice the line frequency. This is due to imperfect filtering of the
instantaneous power signal to generate the active power signal—
see the Active Power Calculation section. Equation 9 from the
instantaneous power signal. This is filtered by LPF2, which has
a magnitude response given by Equation 17.
1 +
is for the manufacturer to provide an output frequency, which is
proportional to the energy or active power under steady load
conditions. This output frequency can provide a simple, single-
wire, optically isolated interface to external calibration
H ( f ) =
1
f 2
8 . 9 2
(17)
equipment. Figure 67 illustrates the energy-to-frequency
The active power signal (output of LPF2) can be rewritten as
? 1 + ? 8 . 9 ? ?
conversion in the ADE7753.
DFC
11
CFNUM[11:0]
%
0
CF
? ?
? ?
? VI ?
p ( t ) = VI ? ? 2 ?
? ? 2f L ? ?
? ? ? ?
× cos(4π f L t )
(18)
48
AENERGY[48:0]
0
11
0
where f L is the line frequency, for example, 60 Hz.
From Equation 13,
? 4 π f L 1 + ? 8 . 9 ? ?
CFDEN[11:0] 02875-0-066
Figure 67. ADE7753 Energy-to-Frequency Conversion
A digital-to-frequency converter (DFC) is used to generate the
CF pulsed output. The DFC generates a pulse each time 1 LSB
in the active energy register is accumulated. An output pulse is
generated when (CFDEN + 1)/(CFNUM + 1) number of pulses
? ?
? ?
? VI ?
E ( t ) = VIt ? ? 2 ?
? ? 2f L ? ?
? ? ? ?
× sin(4π f L t )
(19)
Rev. C | Page 31 of 60
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